The Perlmutter supercomputer.Berkeley Lab
A team of researchers across Lawrence Berkeley National Laboratory and the University of California has simulated a quantum microchip, marking a key step forward in perfecting chips required for next-generation technology.
The simulation used more than 7,000 NVIDIA GPUs on the Perlmutter supercomputer at the National Energy Research Scientific Computing Center (NERSC), a U.S. Department of Energy (DOE) user facility.
Modelling quantum chips allows researchers to discover their function and performance before any fabrication, ensuring that they work as intended and spot any potential problems that might surface.
“The computational model predicts how design decisions affect electromagnetic wave propagation in the chip. The computational model predicts how design decisions affect electromagnetic wave propagation in the chip,” said Andy Nonaka, a member of the Applied Mathematics and Computational Research (AMCR) Division at Berkeley Lab.
Dissecting the procedure
The team used an exascale modeling tool called ARTEMIS to design and optimize the chip. The chip being modeled was created through a collaboration between Irfan Siddiqi’s Quantum Nanoelectronics Laboratory at UC Berkeley and Berkeley Lab’s Advanced Quantum Testbed (AQT).
Designing quantum chips incorporates traditional microwave engineering alongside advanced low-temperature physics. ARTEMIS was developed as a part of the DOE’s Exascale Computing Project initiative.
To model the tiny, intricate details of the chip, researchers tapped nearly the full capacity of Perlmutter. They used almost all 7,168 NVIDIA GPUs for 24 hours.
That power was needed to accurately capture the structure and behavior of a multilayer chip just 10 mm wide, 10 mm long, 0.3 mm thick, with micron-scale etchings.
“I’m not aware of anybody who’s ever done physical modeling of microelectronic circuits at full Perlmutter system scale. We were using nearly 7,000 GPUs,” said Nonaka.
“We discretized the chip into 11 billion grid cells. We were able to run over a million time steps in seven hours, which allowed us to evaluate three circuit configurations within a single day on Perlmutter. These simulations would not have been possible in this time frame without the full system,” he explained further.
“This effort stands out as one of the most ambitious quantum projects on Perlmutter to date, using ARTEMIS and NERSC’s computing capabilities to capture quantum hardware detail over more than four orders of magnitude,” said Katie Klymko, a NERSC quantum computing engineer.
Peeking into the future
The team plans to run additional simulations to deepen their quantitative understanding of the chip’s design and evaluate how it performs in a larger quantum system.
Eventually, the simulation will take the ultimate test: comparison with the physical world. When the chip is fabricated and put through its paces, the researchers will see how their model measured up and make adjustments from there.
“This unprecedented simulation, made possible by a broad partnership among scientists and engineers, is a critical step forward to accelerate the design and development of quantum hardware,” explained QSA director Bert de Jong.
“More powerful, more performant quantum chips will unlock new capabilities for researchers and open up new avenues in science,” he said.